32 hw_uart_data_bits_5 = 5,
33 hw_uart_data_bits_6 = 6,
34 hw_uart_data_bits_7 = 7,
35 hw_uart_data_bits_8 = 8,
43 hw_uart_stop_bits_1 = 1,
44 hw_uart_stop_bits_2 = 2,
62 hw_uart_flow_control_none,
63 hw_uart_flow_control_cts,
64 hw_uart_flow_control_rts,
65 hw_uart_flow_control_cts_rts,
bool unbuffered
Set true to skip the backend's software ring buffer and transfer directly against the hardware's sing...
hw_uart_flow_control_t
UART hardware flow control mode.
struct hw_gpio_t hw_gpio_t
GPIO logical pin structure.
GPIO (General Purpose Input/Output) interface.
hw_uart_parity_t parity
Parity mode for transmitted and received frames.
Opaque byte streams for reading, writing, seeking, and readiness notification.
hw_uart_parity_t
UART parity configuration.
struct sys_iostream_t sys_iostream_t
An opaque byte stream.
bool hw_uart_flush(sys_iostream_t *uart, uint32_t timeout_ms)
Wait for UART transmission to complete.
UART initialization configuration.
hw_uart_stop_bits_t
UART stop bit configuration.
hw_uart_stop_bits_t stop_bits
Number of stop bits per frame.
sys_iostream_t * hw_uart_init(const hw_gpio_t *rx_pin, const hw_gpio_t *tx_pin, uint32_t baud_rate, const hw_uart_config_t *config)
Initialize a UART device.
hw_uart_data_bits_t
UART data bit configuration.
hw_uart_flow_control_t flow_control
Flow-control mode to enable.
hw_uart_data_bits_t data_bits
Number of data bits per frame.
sys_iostream_t * hw_uart_init_device(const char *device, uint32_t baud_rate, const hw_uart_config_t *config)
Initialize a UART by device path.
const hw_gpio_t * cts_pin
Optional CTS pin for hardware flow control.
const hw_gpio_t * rts_pin
Optional RTS pin for hardware flow control.